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MemoryReading · ~3 min · 57 words deep

CoWoS-L

CoWoS-L is TSMC's advanced packaging tech that uses a large local silicon interposer to pack more HBM and chiplets into a single GPU · foundation of Blackwell B300 and MI400.

TL;DR

CoWoS-L is TSMC's advanced packaging tech that uses a large local silicon interposer to pack more HBM and chiplets into a single GPU · foundation of Blackwell B300 and MI400.

Level 1

Chip-on-Wafer-on-Substrate-Large (CoWoS-L) is TSMC's advanced packaging for high-end AI chips. Replaces CoWoS-S used on H100. CoWoS-L increases silicon interposer size, allowing 8-12 HBM stacks + multiple compute die per package. Demand for CoWoS-L is the industry bottleneck · TSMC is expanding Chiayi fab specifically for it.

Level 2

CoWoS-L uses Local Silicon Interconnect (LSI) bridges instead of a single monolithic interposer, lowering cost and enabling larger package sizes. Supports reticle-limit breaking designs (B300 is ~2× reticle size, physically impossible with CoWoS-S). TSMC capacity for CoWoS-L: ~30K wafers/month (Q4 2025), ramping to 60K by end 2026. Each wafer yields ~20-40 CoWoS packages depending on chip complexity.

Level 3

CoWoS-L supply is the single biggest physical constraint in AI hardware. NVIDIA, AMD, Broadcom, Marvell, and others all compete for TSMC CoWoS-L capacity. Reported allocations: NVIDIA ~60% of CoWoS-L, AMD ~15%, others splitting remainder. Expansion at TSMC's Chiayi fab will unlock 2× capacity by end 2026. Japanese packagers (Ibiden, Shinko) supply substrates; shortage here also constrains output.

Why this matters now

CoWoS-L capacity is the primary bottleneck for H200/B200/B300 supply · drives 2025-26 AI compute scarcity.

The takeaway for you
If you are a
Researcher
  • ·TSMC next-gen advanced packaging · LSI bridges
  • ·Supports reticle-breaking designs (B300 ~2× reticle)
  • ·8-12 HBM stacks per package
If you are a
Builder
  • ·Not directly accessible · affects GPU supply
  • ·Explains why H200/B200 are supply-constrained
  • ·Watch capacity expansion for supply outlook
If you are a
Investor
  • ·Single biggest AI hardware bottleneck
  • ·TSMC capacity expansion is the key indicator
  • ·Downstream: chip revenue gated by packaging, not fab
If you are a
Curious · Normie
  • ·A special way TSMC sticks AI chip pieces together
  • ·Needed for the best AI chips · hard to make enough
  • ·Why AI computers are hard to buy
Gecko's take

CoWoS-L is the most important word in AI hardware supply · if you see a shortage, CoWoS-L is probably the bottleneck.

Building larger interposers is harder than building more chips. TSMC is the only supplier at scale. Capacity expansion takes years.